We are designing a microTCA module called the DTC (DAQ and Timing Card) for the HCAL SLHC readout. It is currently envisioned that this will occupy one of the MCH slots in a dual-star type crate. Initially we would build cards for MCH connectors 1 and 2, providing clock distribution on finger 2, and fast controls and trigger feedback on port 1 of fabric A on finger 1.

DTCDebugLog – Please log all significant test activity here


  • MCH_MECHANICS.pdf – MCH board stack with component height restrictions. (ref uTCA standard p2-69 (117) and AMC.0 spec p2-25 (65)).

Design Thoughts

Clocking – per AMC spec:

Type AMC Name μTCA Name Contacts Direction
Telecom TCLKA CLK1 74/75 In to AMC
Telecom TCLKB CLK2 77/78 Out from AMC
Telecom TCLKC   135/136 In to AMC
Telecom TCLKD   138/139 Out from AMC
Fabric FCLKA CLK3 80/81 In to AMC

On the CTR2 FCLKA, TCLKA and TCLKC all enter an SN65LVDT125A? LVDS crosspoint switch, and from there can be routed to the FPGA or links, possibly via an Si5319 frequency synthesizer.

Also, MiniCTR2? connects to ports 0, 1, 8 with GTX. All other ports are connected to generic FPGA I/Os.

Jeremy's requests: Transmit LHC clock on CLK1 or CLK3. TTC encoded stream on Fabric B Tx (port 2/3). TTS received on Fabric B Rx (port 2/3).

CorEdge? mini crate backplane: Only CLK2, CLK3 routed. Fabric A to port 0. Fabric B to port 2. Fabrics D-G to ports 4-7.

Wu would prefer to send TTC on a fabric D-G because they are on T3. Instead I think we should send them on fabric B.


MicroTCA? Vendors

-- EricHazen - 22 Jan 2010

Topic revision: r18 - 07 Jul 2010 - 14:50:13 - EricHazen
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