This page contains documentation and firmware to provide an Ethernet endpoint for control and readout of devices implemented using FPGAs. The specification and original implementation were developed by Jeremy Mans at the University of Minnesota.

The code and writeup below was done by Conor Dubois, a student working for me. The code has been demonstrated to work, but I would not consider it production-ready.

He was given the task of taking Jeremy's original IPbus firmware and making it work on a Spartan-6 evaluation board (SP601) with external PHY, and also to improve the performance so that it could more or less keep up with GbE line speed for use in a CCD camera project we're working on. He also converted it to VHDL since that's what we use here.

Originals from J. Mans:

There is an integrated MAC which he hacked together starting from a Xilinx reference design, and it is guaranteed not to be full function!

We currently plan to use this code for the CCD camera application I mentioned, and perhaps also for the CMS-MCH (AMC13) depending on how things go. I do not think we have the resources to support this code in the CMS-wide community.

Current work by C. Dubois at BU:

-- EricHazen - 10 Jan 2011

Topic revision: r1 - 10 Jan 2011 - EricHazen
 
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