Outline plan for AMC13 firmware (initial version for HCAL):

1.  TTC clock / signal distribution, with receiver logic for MiniCTR2B
     (this is maybe already done from last year?)

2.  DAQ data path (backplane readout)
     a)  output to SDRAM spy buffer for IPMI and/or Ethernet readout
     b)  output to optical fiber link (to Xilinx evaluation board, initially)

3.  Trigger path
     Align TP in AMC13 based on BC0, simple trigger algorithm
     Output via TTC SFP fiber at 160Mb/s using TTC protocol

4.  Control/monitoring
     a)  using interface to MMC (SPI or whatever)
     b)  Ethernet using IPbus
          (documentation here: http://projects.hepforge.org/cactus/index.php)
     I suggest that the same set of registers be accessible by Ethernet and SPI

5.  Flash memory programming over Ethernet

Supporting Documents

-- EricHazen - 06 Nov 2011

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Topic revision: r4 - 21 Nov 2011 - EricHazen
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