Each AMC13 as shipped is a 3-board stack (T1, T2, T3). The serial number is set by soldered jumpers on the T2 board (8 bits). On AMC13XG the serial number is printed on the front panel label in decimal.

AMC13XG with Kintex-7

Serial No Status MMC Rev Firmware Rev Location Notes Computer
32 (0x20) HW Tested 2.0 T1: 0x84 T2: 0x15 UMN FW currently broken (IPbus issue)  
33 (0x21) HW Tested 2.1 T1: 0x103 T2: 0x19 Kentucky Sent to Tim Gorringe (G-2) (2/28/14). T3 reattached (after Clock Tests), (2/14/14 Working and Tested)  
34 (0x22) HW Tested 2.1 T1: 0x8d T2: 0x17 BU (Working, 3/3/14, using SN34 T1 and SN37 T2 board, for some reason the IP address autoconfigures to 192.168.1.100/1 equivalent ip of SN77) (prev at cornell) Won't power up? (Testing, 8/6/2013) Problem seems to be in T1 board. Swapped parts w/ SN 43 for testing. SN34 T2 w/ the SN43 T1 seems to work. SN34 T1 w/ SN43 T2 exhibiting same problems. (Currently disassembled in EDF 2/10/14)  
35 (0x23) HW Tested 2.0 T1: 0x84 T2: 0x17 UW Madison FW currently broken (IPbus issue)  
36 (0x24) HW Tested 2.0 T1: 0x86 T2: 0x17 Imperial College FW currently broken (IPbus issue)  
 
37 (0x25) Some HW Problems   T1: 0x87 T2: 0x17 BU Handle mechanism fixed. FPGA Unconfigure after update to 0x89 firmware (2/10/2014 - Now has T1: 0x102 T2:0x19 firmware and experiencing memory problem)  
38 (0x26) HW Tested 2.0 T1: 0x87 T2: 0x17 CERN FW works at 2.5 Gb/s backplane link speed  
39 (0x27) HW Tested 2.1 T1: 0x8d T2: 0x17 Cornell Ship to Cornell 7/30/13, returned to BU capacitor on T2 replace and hand carried back to Cornell by Nic (after testing)  
40 (0x28) HW Tested 2.1 T1: 0x103 T2: 0x19 BU (2/14/14 Working and Tested)  
41 (0x29) HW Tested 2.1 T1: 0x8d T2: 0x17 CERN Ship 7/29/13 to Magnus c/o Laza  
 
42 (0x2a) HW Tested 2.1 T1: 0x103 T2: 0x19 BU (2/14/14 Working and Tested)  
43 (0x2b) HW Tested 2.1 T1: 0x103 T2: 0x19 BU Working (12/13), T3 reattached (after Clock Tests) , swapped parts w/ SN 39 for testing. SN 43 front panel attached to SN43 T1 and SN39T2. SN43 T2 in bag labelled SN43  
44 (0x2c) HW Tested 2.1 T1: 0x8d T2:0x17 CERN Ship 7/29/13 to Magnus c/o Laza , experiencing problems communicating w/ board  
45 (0x2d) HW Tested 2.1 T1:0x94 T2: 0x17 CERN Ship 10/1/13 to CERN, Laza  
46 (0x2e) HW Tested 2.1 T1:0x8d T2: 0x17 Bristol    

Boards with Virtex-6 LX130T

Serial No Status Firmware RevSorted ascending Location Notes Computer
12 Tested OK 2012-01-21 Imperial Delivered 22-Jan-2012 to G. Iles with 3xSFP, fibers[1], moved to Imperial College heppc209.hep.ph.ic.ac.uk
2 ? ?      
8 Tested OK ? Minnesota Shipped 24-Jan-2012 to UMN [2] cmslab1.spa.umn.edu
9 Fail ? BU    
1 Tested OK S=0x11 V=0x25 CERN for Calcutta Retest 8/31/12  
7 Tested OK S=0xb V=0x10   ship to GEM group 2012-07-26 (Brussels)  
3 Tested OK S3 UFL Retest 8/31/12 (LED issue?). 9/9/13 in U Florida with Cody Reeves  
4 Tested OK S3 BU Crate Retest 8/31/12  
5 Tested OK S3 Vienna (GT) shipped to Vienna Feb2012  
11 Tested OK S3, S=0x17 V=0x25   shipping to CERN Feb2012, "AMC13 s/n 11 to the Meyrin site, and will bring it to Tina on Tuesday, for shipment to FNAL" Aug 1, 2013 in 904?
6 Tested OK S6 V3 40-2B0-01 Delivered 22-Jan-2012 to D. Gigi with 3xSFP, fibers[1] pcphcmd01.cern.ch
10 Tested OK S6 V3   shipped to CERN Feb2012 hcaldaq12 (P5)

Boards with Virtex-6 LX240T

Serial No Status Firmware Rev Location Notes Computer
16 Tested OK S=0xb V=0xf UW Shipped to MSN 7/25/12 daq@login.hep.wisc.edu then daq@ayinger.hep.wisc.edu
17 Tested OK S=0xb V=0xf UW Shipped to MSN 7/25/12  
18 Tested OK S=0xb V=0xf UW Shipped to MSN 7/25/12  
19 Tested OK S=0x17 V=0x2a BU Retest 8/31/12, productiontest errors 6/18/13  
20 Tested OK   BU? Not in CMS Lab    

Two more boards shipped to DESY and Rice in Nov 2012.

Notes:

[1] Module delivered with two 8Gb/s HP SFP and one 160Mb/s low speed SFP, plus one TTC fiber and one high-speed fiber.

[2] Shipped with 160Mb/s low speed SFP only plus TTC and high-speed fibers

Version which is critical is the T2 (Spartan) as it provides the flash update interface. Version 6 (S6) is the first version with the "final" flash layout with golden (backup) configuration. Modules with a T2 version earlier than S6 can be updated first by programming S6 to flash address 0x0 (may require older software) and then using the current software to program the Header (0x0), Golden (0x100000), Spartan (0x200000), and Virtex (0x400000). One this is done, new firmware may be loaded from the flash by software command without power cycle.

Inventory of SFPs in BU CMS Lab
-- EricHazen - 24 Jan 2012, appended J. Rohlf 26 May 2012
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Topic revision: r69 - 03 Mar 2014 - DavidZou
 
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