Each AMC13 as shipped is a 3-board stack (T1, T2, T3). The serial number is set by soldered jumpers on the T2 board (8 bits). For now, the serial number is written on the front panel with a marker and is a small integer.
AMC13XG with Kintex-7
Serial No |
Status |
MMC Rev |
Firmware Rev |
Location |
Notes |
Computer |
32 (0x20) |
HW Tested |
2.0 |
T1: 0x84 T2: 0x15 |
UMN |
FW currently broken (IPbus issue) |
|
33 (0x21) |
HW Tested |
2.1 |
T1: 0x8a T2: 0x17 |
BU |
Probe attached for Clock Tests (T3 off) |
|
34 (0x22) |
HW Tested |
2.1 |
T1: 0x8d T2: 0x17 |
Cornell |
Ship to Cornell 7/30/13 |
|
35 (0x23) |
HW Tested |
2.0 |
T1: 0x84 T2: 0x17 |
UW Madison |
FW currently broken (IPbus issue) |
|
36 (0x24) |
HW Tested |
2.0 |
T1: 0x86 T2: 0x17 |
Imperial College |
FW currently broken (IPbus issue) |
|
|
37 (0x25) |
Some HW Problems |
|
T1: 0x87 T2: 0x17 |
BU |
Handle mechanism fixed. FPGA Unconfigure after update to 0x89 firmware |
|
38 (0x26) |
HW Tested |
2.0 |
T1: 0x87 T2: 0x17 |
CERN |
FW works at 2.5 Gb/s backplane link speed |
|
39 (0x27) |
HW Tested |
2.1 |
T1: 0x87 T2: 0x17 |
Cornell |
Won't power up? |
|
40 (0x28) |
HW Tested |
2.1 |
T1: 0x8b T2: 0x17 |
BU |
Currently being used in AMC13 slot--has correct front panel |
|
41 (0x29) |
HW Tested |
2.1 |
T1: 0x8d T2: 0x17 |
BU |
Ship 7/29/13 to Magnus c/o Laza |
|
|
42 (0x2a) |
HW Tested |
2.1 |
T1: 0x8a T2: 0x17 |
BU |
|
|
43 (0x2b) |
HW Tested |
2.1 |
T1: 0x8a T2: 0x17 |
BU |
Probe attached for Clock Tests (T3 off) |
|
44 (0x2c) |
HW Tested |
2.1 |
T1: 0x8d T2:0x17 |
BU |
Ship 7/29/13 to Magnus c/o Laza |
|
45 (0x2d) |
HW Tested |
2.1 |
T1:0x8a T2: 0x17 |
BU |
|
|
46 (0x2e) |
HW Tested |
2.1 |
T1:0x8a T2: 0x17 |
BU |
|
|
Boards with Virtex-6 LX130T
Serial No |
Status |
Firmware Rev |
Location |
Notes |
Computer |
1 |
Tested OK |
S=0x10 V=0xd |
CERN for Calcutta |
Retest 8/31/12 |
|
2 |
? |
? |
|
|
|
3 |
Tested OK |
S3 |
BU Crate |
Retest 8/31/12 (LED issue?) |
|
4 |
Tested OK |
S3 |
BU Crate |
Retest 8/31/12 |
|
5 |
Tested OK |
S3 |
Vienna (GT) |
shipped to Vienna Feb2012 |
|
6 |
Tested OK |
S6 V3 |
40-2B0-01 |
Delivered 22-Jan-2012 to D. Gigi with 3xSFP, fibers[1] |
pcphcmd01.cern.ch |
7 |
Tested OK |
S=0xb V=0x10 |
|
ship to GEM group 2012-07-26 (Brussels) |
|
8 |
Tested OK |
? |
Minnesota |
Shipped 24-Jan-2012 to UMN [2] |
cmslab1.spa.umn.edu |
9 |
Fail |
? |
BU |
|
|
10 |
Tested OK |
S6 V3 |
|
shipped to CERN Feb2012 |
hcaldaq12 (P5) |
11 |
Tested OK |
S3 |
|
shipping to CERN Feb2012 |
in 904? |
12 |
Tested OK |
2012-01-21 |
Imperial |
Delivered 22-Jan-2012 to G. Iles with 3xSFP, fibers[1], moved to Imperial College |
heppc209.hep.ph.ic.ac.uk |
Boards with Virtex-6 LX240T
Two more boards shipped to DESY and Rice in Nov 2012.
Notes:
[1] Module delivered with two 8Gb/s HP SFP and one 160Mb/s low speed SFP, plus one TTC fiber and one high-speed fiber.
[2] Shipped with 160Mb/s low speed SFP only plus TTC and high-speed fibers
Version which is critical is the T2 (Spartan) as it provides the flash update interface.
Version 6 (S6) is the first version with the "final" flash layout with golden (backup) configuration.
Modules with a T2 version earlier than S6 can be updated first by programming S6 to flash address 0x0 (may require older software) and then using the current software to program the Header (0x0), Golden (0x100000), Spartan (0x200000), and Virtex (0x400000). One this is done, new firmware may be loaded from the flash by software command without power cycle.
--
EricHazen - 24 Jan 2012, appended J. Rohlf 26 May 2012