Difference: DTCDesign (7 vs. 8)

Revision 812 Nov 2009 - EricHazen

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META TOPICPARENT name="CmsSlhc"
We are designing a microTCA module called the DTC (DAQ and Timing Card) for the HCAL SLHC readout. It is currently envisioned that this will occupy one of the MCH slots in a dual-star type crate.
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  Wu's current thoughts: Transmit TTC clock on Fabric B (port 2/3) Tx (MCH->AMC) pair, TTC data on other pair of Fabric B. But MiniCTR2 does not connect port B to clock-friendly inputs. So, maybe back to TTC clock on CLK1, TTC data on Fabric B?
Changed:
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Also, MiniCTR2 connects only to ports 0, 1 with GTX, so DAQ can't be on fat pipes (sigh).
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Also, MiniCTR2 connects to ports 0, 1, 8 with GTX.

Jeremy's requests: Transmit LHC clock on CLK1 or CLK3. TTC encoded stream on Fabric B Tx (port 3/4). TTS received on Fabric B Rx (port 3/4).

 

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