Difference: AMC13DebugLog (44 vs. 45)

Revision 4504 Jun 2013 - DavidZou

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META TOPICPARENT name="CmsSlhc"
Please log AMC13 test activity below, blog style (new entries at top)

2013-06-04 David, Eric, Ben

Changed:
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  • Trying to test S/N 34. Observe that after running Charlie's production test that we can't run it again, and in fact even after power cycling can't ping T1. Try eeperase and mreset on the MMC, still no go!
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  • Trying to test S/N 34 in slot 4. Observe that after running Charlie's production test that we can't run it again, and in fact even after power cycling can't ping T1. Try eeperase and mreset on the MMC, still no go!
 
  • Try the same treatment on S/N 39. Both FPGAs still respond to ping. But the test fails in a different way the 2nd time.
  • Mysteries abound. Could be hardware, MMC or production test software or a combination of them. In any case shipping anything under these conditions seems like a poor idea.
Changed:
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  • production test seems to not work twice in a row, but seems to work after a handle power reset. But an error will often occur on the first attempt after the handle reset: INFO: Checking the validity of the saved DAQ events in RAM terminate called after throwing an instance of 'cms::ipDev::exception' what(): IPbus Transaction Failure at address '0x5800' during block read from address '0x5800'
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  • production test seems to not work twice in a row without spitting errors, but seems to work after a handle power reset. But an error will often occur on the first attempt if you do not wait sufficiently long for the AMC13 to boot up (2 min was sufficient).
  • Had similar problems while trying to program the FPGA firmware for S/N 44 in slot 4. After programming the FPGA's and loading, continued to get T1 not found at this location error. Note that prior to this, we were able to program S/N 43 in slot 3 with no problems.
  • Errors arise while trying to read from the flash. T1 Error : IPbus Transaction failure during write to register 'FLASH_CMD' or T2 Error : IPbus Transaction failure during write to register 'FLASH_WBUF'
  • Trying to program S/N 45 in slot 3 using 0x89. After programming FPGA, T1 is unreachable. Revert to T1 FPGA of 0x87 and T1 is working again.
 

2013-05-30 hazen

 
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