Difference: IPaddressAssignment (1 vs. 26)

Revision 2604 Nov 2020 - ChristopherCosby

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 11 to 11
 

How the AMC13 IP Address is assigned

1. Via the Serial Number

Added:
>
>
 This scheme acts as the "backup" plan, using the jumper connections on T2 to assign IP addresses to both tongues The address is 192.168.z.x
  • Final Byte for Spartan Chip (T2) = 254 - 2*SN[6:0]
  • Final Byte for Virtex/Kintex Chip (T1) = 255 - 2*SN[6:0].
Changed:
<
<		z is 1 for SN 0-127 and 2 for SN 128-255 and 3 for SN 256-383.
>
>		z is 1 for SN 0-127 and 2 for SN 128-255 and 3 for SN 256-383.
  N.B.Serial numbers 0, 128, 256 are not used as it would result in IP address ending in 255, which can cause troubles on some networks.
Line: 35 to 37
 See https://twiki.cern.ch/twiki/bin/viewauth/CMS/CMSCommonMacAddresses.

Firmware review reveals-

Changed:
<
<
  nSN <= not SerialNumber;
  mac => x"080030f30" & "000"                  & not nSN(7 downto 6) & '0' & nSN(5 downto 0)   #old T2
  mac => x"080030f30" & '0' & not nSN(8) & '0' & not nSN(7 downto 6) & '0' & nSN(5 downto 0),  #new T2
  mac <= x"080030f30" & '0' & not nSN(8) & '0' & not nSN(7 downto 6) & '1' & nSN(5 downto 0);  #all T1
>
>		 
  nSN <= not SerialNumber;
  mac => x"080030f30" & "000"                  & not nSN(7 downto 6) & '0' & nSN(5 downto 0)   #old T2
  mac => x"080030f30" & '0' & not nSN(8) & '0' & not nSN(7 downto 6) & '0' & nSN(5 downto 0),  #new T2
  mac <= x"080030f30" & '0' & not nSN(8) & '0' & not nSN(7 downto 6) & '1' & nSN(5 downto 0);  #all T1
 

So all MAC addr start with 08-00-30-F3.

Line: 52 to 54
 
9 '0'
10 S/N( 8)
11 '0'
Deleted:
<
<
 This results in a range of 00-00 to 01-FF for AMC13 serial# 0-255 and 04-00 to 05-FF for AMC13 serial# 256-511.

-- EricHazen - 21 Mar 2016

Added:
>
>

IP and MAC Address Calculator

Download and run this python script ($ python addressCalc.py -s serial_no), to get a quick printout of the IP and MAC address for a given SN

-- Christopher Cosby - 04 Nov 2020

 \ No newline at end of file

Revision 2521 Mar 2016 - EricHazen

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META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 34 to 34
  See https://twiki.cern.ch/twiki/bin/viewauth/CMS/CMSCommonMacAddresses.
Changed:
<
<		For all AMC13XG with current firmware, the MAC address is in the range 08-00-30-F3-00-00 to 08-00-30-F3-01-FF with the low 9 bits as follows:
>
>		Firmware review reveals-
 
Changed:
<
<		 bits 0-5 complement of serial number bits 0-5 bit 6 =0 for T2 board (lower IP) =1 for T1 board (upper IP) bit 7, 8 serial number bits 6, 7 (complemented for S/N > 64)
>
>		 nSN <= not SerialNumber; mac => x"080030f30" & "000" & not nSN(7 downto 6) & '0' & nSN(5 downto 0) #old T2 mac => x"080030f30" & '0' & not nSN(8) & '0' & not nSN(7 downto 6) & '0' & nSN(5 downto 0), #new T2 mac <= x"080030f30" & '0' & not nSN(8) & '0' & not nSN(7 downto 6) & '1' & nSN(5 downto 0); #all T1
 
Added:
>
>		So all MAC addr start with 08-00-30-F3. The S/N bits are mapped to MAC address bits as follows:
 
Changed:
<
<		Example:

If we have a board with serial number 37, we can calculate the last digit of the MAC address:

63-37 = 26, which is 0x1a in hex

SN37 MAC addresses:

08-00-30-F3-00-1a (for T2, low IP)and

08-00-30-F3-00-5a (for T1, higher IP)

For modules with serial numbers above 63 the upper two bits are complemented and assigned to MAC address bits 7, 8.

example SN66 (0b01000010)

66 (inserted) 0 1   0 0 0 0 1 0
66 T1 1 0 1 1 1 1 1 0 1
66 T1 1 7       d      
66 T2 1 0 0 1 1 1 1 0 1
66 T2 1 3       d      
compliment 1 0   1 1 1 1 0 1
  bit 8 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit0
  upper 2 bits     lower six bits      
  Byte2 Byte 1       Byte 0      

SN66 MAC addresses:

08-00-30-F3-01-3d (for T2, low IP)and

>
>
MAC Source
5:0 not S/N( 5:0)
6 T2=0 T1=1
8:7 S/N( 7:6)
9 '0'
10 S/N( 8)
11 '0'
 
Changed:
<
<		 08-00-30-F3-01-7d (for T1, higher IP)
>
>		This results in a range of 00-00 to 01-FF for AMC13 serial# 0-255 and 04-00 to 05-FF for AMC13 serial# 256-511.
 
Deleted:
<
<		-- EricHazen - 12 Mar 2014
 \ No newline at end of file
Added:
>
>		-- EricHazen - 21 Mar 2016

Revision 2416 Sep 2015 - EricHazen

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META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 15 to 15
 The address is 192.168.z.x
  • Final Byte for Spartan Chip (T2) = 254 - 2*SN[6:0]
  • Final Byte for Virtex/Kintex Chip (T1) = 255 - 2*SN[6:0].
Changed:
<
<		z is 1 for SN 0-127 and 2 for SN 128-255.
>
>		z is 1 for SN 0-127 and 2 for SN 128-255 and 3 for SN 256-383.
 
Changed:
<
<		N.B.Serial numbers 0, 128 are not used as it would result in IP address ending in 255,
>
>		N.B.Serial numbers 0, 128, 256 are not used as it would result in IP address ending in 255,
 which can cause troubles on some networks.

2. Via MMC SPI EEPROM

Revision 2319 Jun 2015 - EricHazen

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META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 32 to 32
 

AMC13 MAC address assignment

Added:
>
>		See https://twiki.cern.ch/twiki/bin/viewauth/CMS/CMSCommonMacAddresses.
 For all AMC13XG with current firmware, the MAC address is in the range 08-00-30-F3-00-00 to 08-00-30-F3-01-FF with the low 9 bits as follows:

Revision 2218 Mar 2015 - DavidZou

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 39 to 39
  bits 0-5 complement of serial number bits 0-5 bit 6 =0 for T2 board (lower IP) =1 for T1 board (upper IP)
Changed:
<
<		 bit 7, 8 serial number bits 6, 7 (not complemented)
>
>		 bit 7, 8 serial number bits 6, 7 (complemented for S/N > 64)
 

Revision 2122 Jan 2015 - DavidZou

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META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 15 to 15
 The address is 192.168.z.x
  • Final Byte for Spartan Chip (T2) = 254 - 2*SN[6:0]
  • Final Byte for Virtex/Kintex Chip (T1) = 255 - 2*SN[6:0].
Changed:
<
<		z is 0 for SN 0-127 and 1 for SN 128-255.
>
>		z is 1 for SN 0-127 and 2 for SN 128-255.
  N.B.Serial numbers 0, 128 are not used as it would result in IP address ending in 255, which can cause troubles on some networks.

Revision 2006 Jan 2015 - EricHazen

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 13 to 13
 

1. Via the Serial Number

This scheme acts as the "backup" plan, using the jumper connections on T2 to assign IP addresses to both tongues The address is 192.168.z.x
Changed:
<
<
  • Final Byte for Spartan Chip = 254 - 2*SN[6:0]
  • Final Byte for Virtex/Kintex Chip = 255 - 2*SN[6:0].
>
>
  • Final Byte for Spartan Chip (T2) = 254 - 2*SN[6:0]
  • Final Byte for Virtex/Kintex Chip (T1) = 255 - 2*SN[6:0].
 z is 0 for SN 0-127 and 1 for SN 128-255.

N.B.Serial numbers 0, 128 are not used as it would result in IP address ending in 255,

Revision 1906 Jan 2015 - EricHazen

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 12 to 12
 

How the AMC13 IP Address is assigned

1. Via the Serial Number

This scheme acts as the "backup" plan, using the jumper connections on T2 to assign IP addresses to both tongues
Changed:
<
<		The address is 192.168.1.x
  • Final Byte for Spartan Chip = 254 - 2*SN
  • Final Byte for Virtex/Kintex Chip = 255 - 2*SN
>
>		The address is 192.168.z.x
  • Final Byte for Spartan Chip = 254 - 2*SN[6:0]
  • Final Byte for Virtex/Kintex Chip = 255 - 2*SN[6:0].
z is 0 for SN 0-127 and 1 for SN 128-255.

N.B.Serial numbers 0, 128 are not used as it would result in IP address ending in 255, which can cause troubles on some networks.

 

2. Via MMC SPI EEPROM

In this scheme, the MMC sends a configuration packet which contains the IP address to be assigned from non-volitile EEPROM to the Spartan and Virtex chips at powerup. For information on how to load new configuration information into the SPI, see the MMC software page

3. RARP from a software daemon.

Line: 27 to 32
 

AMC13 MAC address assignment

Changed:
<
<		For all boards produced through 2013 (Serial numbers below 64) the MAC address is as follows: 08-00-30-F3-00-xx With xx:
>
>		For all AMC13XG with current firmware, the MAC address is in the range 08-00-30-F3-00-00 to 08-00-30-F3-01-FF with the low 9 bits as follows:
 
  bits 0-5     complement of serial number bits 0-5
  bit 6        =0 for T2 board (lower IP)

Revision 1821 Aug 2014 - DavidZou

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 7 to 7
 

BU Crate MCH IP addresses

MCH IP Address
NAT MCH 192.168.1.41
Changed:
<
<
Valatech MCH 192.168.1.2
>
>
Vadatech MCH 192.168.1.2
 

How the AMC13 IP Address is assigned

1. Via the Serial Number

Revision 1718 Jul 2014 - DavidZou

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

The AMC13 has two PCB Tongues. Tongue 1 (T1) and Tongue 2 (T2) each has their own FPGA (Virtex6/Kintex7 for T1, Spartan6 for T2) and therefore each has their own IP address. Typically T2 has an IP address one higher in the last octet than T1.

Changed:
<
<

How the IP Address is assigned

>
>

BU Crate MCH IP addresses

MCH IP Address
NAT MCH 192.168.1.41
Valatech MCH 192.168.1.2

How the AMC13 IP Address is assigned

 

1. Via the Serial Number

This scheme acts as the "backup" plan, using the jumper connections on T2 to assign IP addresses to both tongues The address is 192.168.1.x

Revision 1614 May 2014 - EricHazen

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META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 26 to 26
  08-00-30-F3-00-xx With xx:
Changed:
<
<		 bits 0-5 complement of serial number 0-63
>
>		 bits 0-5 complement of serial number bits 0-5
  bit 6 =0 for T2 board (lower IP) =1 for T1 board (upper IP)
Changed:
<
<		 bit 7 =0
>
>		 bit 7, 8 serial number bits 6, 7 (not complemented)
 
Added:
>
>
 Example:

If we have a board with serial number 37, we can calculate the last digit of the MAC address:

Deleted:
<
<
xx = hex(63 - (SN))  [for T2]
xx = hex(63 - (SN))  [for T1]
 63-37 = 26, which is 0x1a in hex

SN37 MAC addresses:

Revision 1514 May 2014 - DavidZou

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META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 37 to 37
 If we have a board with serial number 37, we can calculate the last digit of the MAC address:
Changed:
<
<		xx = hex(63 - (SN))
>
>		xx = hex(63 - (SN)) [for T2] xx = hex(63 - (SN)) [for T1]
 

63-37 = 26, which is 0x1a in hex

Line: 54 to 55
 SN66 (0b01000010)

  bit 8 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit0
Changed:
<
<
66 (inserted) 0 1   0 0 0 0 1 1
>
>
66 (inserted) 0 1   0 0 0 0 1 0
 
  upper 2 bits     lower six bits      
Changed:
<
<
compliment 1 0   1 1 1 1 0 0
>
>
compliment 1 0   1 1 1 1 0 1
 
  Byte2 Byte 1       Byte 0      
Changed:
<
<
66 T2 1 0 0 1 1 1 1 0 0
>
>
66 T2 1 0 0 1 1 1 1 0 1
 
66 T2 1 3       d      
Changed:
<
<
66 T1 1 0 1 1 1 1 1 0 0
>
>
66 T1 1 0 1 1 1 1 1 0 1
 
66 T1 1 7       d      

SN66 MAC addresses:

Revision 1413 May 2014 - DavidZou

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META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 48 to 48
  08-00-30-F3-00-5a (for T1, higher IP)
Changed:
<
<		For modules with serial numbers above 63 the upper two bits are complemented and assigned to MAC address bits 7, 8.
>
>		For modules with serial numbers above 63 the upper two bits are complemented and assigned to MAC address bits 7, 8.

example SN66 (0b01000010)

  bit 8 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit0
66 (inserted) 0 1   0 0 0 0 1 1
  upper 2 bits     lower six bits      
compliment 1 0   1 1 1 1 0 0
  Byte2 Byte 1       Byte 0      
66 T2 1 0 0 1 1 1 1 0 0
66 T2 1 3       d      
66 T1 1 0 1 1 1 1 1 0 0
66 T1 1 7       d      

SN66 MAC addresses:

08-00-30-F3-01-3d (for T2, low IP)and

08-00-30-F3-01-7d (for T1, higher IP)

  -- EricHazen - 12 Mar 2014

Revision 1328 Apr 2014 - EricHazen

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

The AMC13 has two PCB Tongues. Tongue 1 (T1) and Tongue 2 (T2) each has their own FPGA (Virtex6/Kintex7 for T1, Spartan6 for T2) and therefore each has their own IP address. Typically T2 has an IP address one higher in the last octet than T1.

Deleted:
<
<		There are several schemes in the midst of being implemented when it comes to AMC13 IP Address assignment. The following procedures are those which I know of at the moment.
 

How the IP Address is assigned

1. Via the Serial Number

This scheme acts as the "backup" plan, using the jumper connections on T2 to assign IP addresses to both tongues
Changed:
<
<		Net Base = 192.168.1
>
>		The address is 192.168.1.x
 
  • Final Byte for Spartan Chip = 254 - 2*SN
  • Final Byte for Virtex/Kintex Chip = 255 - 2*SN

2. Via MMC SPI EEPROM

In this scheme, the MMC sends a configuration packet which contains the IP address to be assigned from non-volitile EEPROM to the Spartan and Virtex chips at powerup. For information on how to load new configuration information into the SPI, see the MMC software page

3. RARP from a software daemon.

Changed:
<
<		This is not yet implemented (until we update our IPBus firmware) but may be come the preferred scheme.
>
>		RARP is enabled with an IP address beginning with 00 in the first octet is set using method 2 above.
  Note that we are working out a new scheme as we go into mass production in early 2014. We expect that the default addresses will be in the range 192.168.x.y where x is 1-4 and y is 128-254.
Line: 32 to 29
  bits 0-5 complement of serial number 0-63 bit 6 =0 for T2 board (lower IP) =1 for T1 board (upper IP)
Added:
>
>		 bit 7 =0
 

Example:

Line: 50 to 48
  08-00-30-F3-00-5a (for T1, higher IP)
Added:
>
>		For modules with serial numbers above 63 the upper two bits are complemented and assigned to MAC address bits 7, 8.
 -- EricHazen - 12 Mar 2014

Revision 1224 Apr 2014 - DavidZou

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 34 to 34
  =1 for T1 board (upper IP)
Changed:
<
<		NOTE: There may be some mistakes in the above algorithm SN 34 has MAC address: 08-00-30-F3-00-1a and 08-00-30-F3-00-5a SN 42 has MAC address: 08-00-30-F3-00-15 and
>
>		Example:

If we have a board with serial number 37, we can calculate the last digit of the MAC address: 

xx = hex(63 - (SN))

63-37 = 26, which is 0x1a in hex

SN37 MAC addresses:

08-00-30-F3-00-1a (for T2, low IP)and

08-00-30-F3-00-5a (for T1, higher IP)

  -- EricHazen - 12 Mar 2014

Revision 1124 Apr 2014 - DavidZou

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 30 to 30
 With xx: 
  bits 0-5  complement of serial number 0-63
Changed:
<
<		 bit 6 =0 for T1 board (lower IP) =1 for T2 board (upper IP)
>
>		 bit 6 =0 for T2 board (lower IP) =1 for T1 board (upper IP)
 

NOTE: There may be some mistakes in the above algorithm SN 34 has MAC address: 08-00-30-F3-00-1a and 08-00-30-F3-00-5a

Changed:
<
<
>
>		SN 42 has MAC address: 08-00-30-F3-00-15 and
  -- EricHazen - 12 Mar 2014

Revision 1024 Apr 2014 - DavidZou

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP and MAC Address Assignment

Line: 34 to 34
  =1 for T2 board (upper IP)
Added:
>
>		NOTE: There may be some mistakes in the above algorithm SN 34 has MAC address: 08-00-30-F3-00-1a and 08-00-30-F3-00-5a
 

-- EricHazen - 12 Mar 2014

Revision 913 Mar 2014 - EricHazen

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"
Changed:
<
<

AMC13 IP Address Assignment

The AMC13 has two PCB Tongues. Tongue 1 (T1) and Tongue 2 (T2) each has their own FPGA (Virtex6/Kintex7 for T1, Spartan6 for T2) and therefore each has their own IP address.
>
>

AMC13 IP and MAC Address Assignment

 
Changed:
<
<		There are several schemes in the midst of being implemented when it comes to AMC13 IP Address assignment. The following procedures are those which I know of at the moment.
>
>		The AMC13 has two PCB Tongues. Tongue 1 (T1) and Tongue 2 (T2) each has their own FPGA (Virtex6/Kintex7 for T1, Spartan6 for T2) and therefore each has their own IP address. Typically T2 has an IP address one higher in the last octet than T1.

There are several schemes in the midst of being implemented when it comes to AMC13 IP Address assignment. The following procedures are those which I know of at the moment.

 

How the IP Address is assigned

1. Via the Serial Number

Line: 13 to 15
 
  • Final Byte for Virtex/Kintex Chip = 255 - 2*SN

2. Via MMC SPI EEPROM

In this scheme, the MMC sends a configuration packet which contains the IP address to be assigned from non-volitile EEPROM to the Spartan and Virtex chips at powerup. For information on how to load new configuration information into the SPI, see the MMC software page
Changed:
<
<

3. RARP from a software daemon. This is not yet implemented (until we update our IPBus firmware) but may be come the preferred scheme.

>
>

3. RARP from a software daemon.

This is not yet implemented (until we update our IPBus firmware) but may be come the preferred scheme.

Note that we are working out a new scheme as we go into mass production in early 2014. We expect that the default addresses will be in the range 192.168.x.y where x is 1-4 and y is 128-254. HCAL will use a crate-based scheme where x is the crate and y is 4*slot.

AMC13 MAC address assignment

For all boards produced through 2013 (Serial numbers below 64) the MAC address is as follows: 08-00-30-F3-00-xx With xx: 

  bits 0-5  complement of serial number 0-63
  bit 6   =0 for T1 board (lower IP)
          =1 for T2 board (upper IP)
  -- EricHazen - 12 Mar 2014 \ No newline at end of file

Revision 812 Mar 2014 - EricHazen

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP Address Assignment

Changed:
<
<		The AMC13 has three PCB Tongues. Tongue 1 (T1) and Tongue 2 (T2) each has their own FPGA (Virtex6/Kintex7 for T1, Spartan6 for T2) and therefore each has their own IP address.
>
>		The AMC13 has two PCB Tongues. Tongue 1 (T1) and Tongue 2 (T2) each has their own FPGA (Virtex6/Kintex7 for T1, Spartan6 for T2) and therefore each has their own IP address.
  There are several schemes in the midst of being implemented when it comes to AMC13 IP Address assignment. The following procedures are those which I know of at the moment.
Line: 13 to 13
 
  • Final Byte for Virtex/Kintex Chip = 255 - 2*SN

2. Via MMC SPI EEPROM

In this scheme, the MMC sends a configuration packet which contains the IP address to be assigned from non-volitile EEPROM to the Spartan and Virtex chips at powerup. For information on how to load new configuration information into the SPI, see the MMC software page
Added:
>
>

3. RARP from a software daemon. This is not yet implemented (until we update our IPBus firmware) but may be come the preferred scheme.

 
Changed:
<
<		 -- JimRohlf - 26 May 2012
>
>		-- EricHazen - 12 Mar 2014
 \ No newline at end of file

Revision 731 May 2013 - CharlieHill

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"

AMC13 IP Address Assignment

Changed:
<
<		The AMC13 has three PCB Tongues, each its own entity. Specifically, Tongue 1 (T1) and Tongue 2 (T2) each has their own FPGA (Virtex6/Kintex7 for T1, Spartan6 for T2) and therefore each has their own IP address.
>
>		The AMC13 has three PCB Tongues. Tongue 1 (T1) and Tongue 2 (T2) each has their own FPGA (Virtex6/Kintex7 for T1, Spartan6 for T2) and therefore each has their own IP address.
  There are several schemes in the midst of being implemented when it comes to AMC13 IP Address assignment. The following procedures are those which I know of at the moment.
Line: 13 to 13
 
  • Final Byte for Virtex/Kintex Chip = 255 - 2*SN

2. Via MMC SPI EEPROM

In this scheme, the MMC sends a configuration packet which contains the IP address to be assigned from non-volitile EEPROM to the Spartan and Virtex chips at powerup. For information on how to load new configuration information into the SPI, see the MMC software page
Changed:
<
<

3. Dynamically at runtime

This can be done using raw IPMITool commands which set the IP address of its slaves (in this case, T1, T2, and T3). Commands are yet to come
>
>
  -- JimRohlf - 26 May 2012

Revision 608 May 2013 - CharlieHill

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"
Changed:
<
<		The AMC13 has three distinct PCB Tongues, each carrying its own functionality. Speicifically, Tongue 1 (T1) and Tongue 2 (T2) each has their own FPGA (Virtex6/Kintex7 for T1, Spartan6 for T2) and therefore each has their own IP address.
>
>

AMC13 IP Address Assignment

The AMC13 has three PCB Tongues, each its own entity. Specifically, Tongue 1 (T1) and Tongue 2 (T2) each has their own FPGA (Virtex6/Kintex7 for T1, Spartan6 for T2) and therefore each has their own IP address.
  There are several schemes in the midst of being implemented when it comes to AMC13 IP Address assignment. The following procedures are those which I know of at the moment.
Line: 11 to 12
 
  • Final Byte for Spartan Chip = 254 - 2*SN
  • Final Byte for Virtex/Kintex Chip = 255 - 2*SN

2. Via MMC SPI EEPROM

Changed:
<
<		In this scheme, the MMC sends a configuration packet which contains the IP address to be assigned from non-volitile EEPROM to the Spartan and Virtex chips. The format of this packet is below: 
00           #AMC13 Slot Number
ff ff 00 00  #Net Mask
c0 a8 01 64  #IP Address
00 00        #Boot Vector

The serial number is etched on the front of the card. It can be discovered using the python program 'find_ver_serial_no.py' or by reading the upper eight bits from register 0x0 on either chip

>
>		In this scheme, the MMC sends a configuration packet which contains the IP address to be assigned from non-volitile EEPROM to the Spartan and Virtex chips at powerup. For information on how to load new configuration information into the SPI, see the MMC software page

3. Dynamically at runtime

This can be done using raw IPMITool commands which set the IP address of its slaves (in this case, T1, T2, and T3). Commands are yet to come
  -- JimRohlf - 26 May 2012

Revision 508 May 2013 - CharlieHill

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"
Changed:
<
<		Each board of the AMC13 with microTCA connectivity, "tongue 2" (T2) for the Spartan and "tongue 1" (T1) for the Virtex has its own IP address. The IP address (192.168.1.xxx) is derived from the AMC13 serial number as follows:
  • Spartan xxx = 254 - 2*(serial no.)
  • Virtex xxx = 255 - 2*(serial no.) = (Spartan xxx) + 1
>
>		The AMC13 has three distinct PCB Tongues, each carrying its own functionality. Speicifically, Tongue 1 (T1) and Tongue 2 (T2) each has their own FPGA (Virtex6/Kintex7 for T1, Spartan6 for T2) and therefore each has their own IP address.

There are several schemes in the midst of being implemented when it comes to AMC13 IP Address assignment. The following procedures are those which I know of at the moment.

How the IP Address is assigned

1. Via the Serial Number

This scheme acts as the "backup" plan, using the jumper connections on T2 to assign IP addresses to both tongues Net Base = 192.168.1
  • Final Byte for Spartan Chip = 254 - 2*SN
  • Final Byte for Virtex/Kintex Chip = 255 - 2*SN

2. Via MMC SPI EEPROM

In this scheme, the MMC sends a configuration packet which contains the IP address to be assigned from non-volitile EEPROM to the Spartan and Virtex chips. The format of this packet is below: 
00           #AMC13 Slot Number
ff ff 00 00  #Net Mask
c0 a8 01 64  #IP Address
00 00        #Boot Vector
  The serial number is etched on the front of the card. It can be discovered using the python program 'find_ver_serial_no.py' or by reading the upper eight bits from register 0x0 on either chip

Revision 401 Mar 2013 - CharlieHill

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"
Each board of the AMC13 with microTCA connectivity, "tongue 2" (T2) for the Spartan and "tongue 1" (T1) for the Virtex has its own IP address. The IP address (192.168.1.xxx) is derived from the AMC13 serial number as follows:
  • Spartan xxx = 254 - 2*(serial no.)

Revision 327 Sep 2012 - CharlieHill

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"
Each board of the AMC13 with microTCA connectivity, "tongue 2" (T2) for the Spartan and "tongue 1" (T1) for the Virtex has its own IP address. The IP address (192.168.1.xxx) is derived from the AMC13 serial number as follows:
  • Spartan xxx = 254 - 2*(serial no.)
  • Virtex xxx = 255 - 2*(serial no.) = (Spartan xxx) + 1
Changed:
<
<		The serial number is etched on the front of the card, may be read from register 0x0 of either FPGA, and may be discovered by running a simple stand-alone python program.
>
>		The serial number is etched on the front of the card. It can be discovered using the python program 'find_ver_serial_no.py' or by reading the upper eight bits from register 0x0 on either chip
  -- JimRohlf - 26 May 2012 \ No newline at end of file

Revision 231 Aug 2012 - EricHazen

Line: 1 to 1
 
META TOPICPARENT name="HcalDTC"
Changed:
<
<		Each board of the AMC13 with microTCA connectivity, "toungue 2" (T2) for the Spartan and "toungue 1" (T1) for the Virtex has its own IP address. The IP address (192.168.1.xxx) is derived from the AMC13 serial number as follows:
>
>		Each board of the AMC13 with microTCA connectivity, "tongue 2" (T2) for the Spartan and "tongue 1" (T1) for the Virtex has its own IP address. The IP address (192.168.1.xxx) is derived from the AMC13 serial number as follows:
 
  • Spartan xxx = 254 - 2*(serial no.)
  • Virtex xxx = 255 - 2*(serial no.) = (Spartan xxx) + 1

Revision 126 May 2012 - JimRohlf

Line: 1 to 1
Added:
>
>
META TOPICPARENT name="HcalDTC"
Each board of the AMC13 with microTCA connectivity, "toungue 2" (T2) for the Spartan and "toungue 1" (T1) for the Virtex has its own IP address. The IP address (192.168.1.xxx) is derived from the AMC13 serial number as follows:
  • Spartan xxx = 254 - 2*(serial no.)
  • Virtex xxx = 255 - 2*(serial no.) = (Spartan xxx) + 1

The serial number is etched on the front of the card, may be read from register 0x0 of either FPGA, and may be discovered by running a simple stand-alone python program.

-- JimRohlf - 26 May 2012

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