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| META TOPICPARENT |
name="DCC2Documentation" |
10 Prototype boards with red front panels were manufactured in early 2009. These boards are not identical to
the production boards because they have a smaller FPGA. The production front panels are marked "DCC2" and are black. |
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| 2130 |
P5 Spares |
1 July 2009: Orbit number mismatches as FED 731 (removed)
31 July 2011 Installed as FED 703
Installed as FED 727 |
9/10/2012 |
OK |
| 2131 |
P5 Spares |
8 May 2012: Removed from FED 720 for spurious reasons (red herring): eLog entry
8 May 2012: Installed back in as FED 721 since the power cycle of previous intervention fried DRAM on 721 eLog Entry |
5/10/2012 |
OK |
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| 2130 |
FED_727 |
1 July 2009: Orbit number mismatches as FED 731 (removed)
31 July 2011 Installed as FED 703
Installed as FED 727 |
9/10/2012 |
OK |
| 2131 |
FED_721 |
8 May 2012: Removed from FED 720 for spurious reasons (red herring): eLog entry
8 May 2012: Installed back in as FED 721 since the power cycle of previous intervention fried DRAM on 721 eLog Entry |
5/10/2012 |
OK |
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| 2132 |
904 Hospital |
23 Jan 2012: Removed because we were not receiving any events over VME in local run. Possible software issue: http://cmsonline.cern.ch/cms-elog/750159 |
23 Jan 2012 |
Sick |
| 2133 |
904 Hospital |
Removed due to CRC errors during intervention on other DCC issues. Suspect spurious issue: http://cmsonline.cern.ch/cms-elog/637389
31 Jan 2012: Fails LRB memory test on LRB2, LRB3. Repaired, test ok 2012-03-06 |
31 Jan 2012 |
OK |
| 2134 |
BU |
Returned to BU because of alleged mis-matches |
5/26 |
Sick |
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| 2136 |
BU |
Shipped back to BU 6/9/09 per dick |
to CERN 5/26 |
OK |
| 2137 |
FED_725 |
Tested. Initially 2 errors. 2nd time tested-no errors. Probably a wiring issue. |
5/26 |
OK |
| 2138 |
FED_726 |
Tested. |
5/26 |
OK |
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| 2140 |
FED_728 |
Tested. Initially 2 errors. 2nd time tested-no errors. Probably a wiring issue. |
5/26 |
OK |
| 2141 |
FED_723 |
Tested. |
5/26 |
OK |
| 2142 |
904 Hospital |
Prior incident as different FED (3/24/10): Was removed when we had an issue where no HTRs were sending data. No other symptoms point to DCC failure.
Removed on 10 May 2012 due to LRB DRAM failure: eLog Entry |
9/10/12 |
BAD LRB |
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| 2149 |
BU |
Tested. U0 soldering problem(most likely because U10 looks OK) Multiple lines to U10 without connection |
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Sick |
| 2150 |
904 Hospital |
Developed memory problems on LRB2 (spigots 6,7,8) during the Dec 2011 shutdown: http://cmsonline.cern.ch/cms-elog/750642. Repaired, test ok 2012-03-06 |
24 Jan 2012 |
OK |
| 2151 |
FED_712 |
Tested. |
6/1 OK |
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| 2152 |
904 Hospital |
CRC Errors in Event Builder but not LRB. All errors from single LRB chip. See details below
While it would be good to run the memory test on this guy, the symptoms are not classic DRAM failure http://cmsonline.cern.ch/cms-elog/402680
31 Jan 2012: Passes LRB, DSP memory tests in 904. Good board? Worth testing at P5 |
6/11/2010 |
Sick |
| 2153 |
FED_720l |
Developed memory problems on LRB3 (sp 9,10,11) during Dec 2011 shutdown. Removed on 24 Jan 2012 http://cmsonline.cern.ch/cms-elog/750642. Repaired, test ok 2012-03-06
8 May 2012 Installed as FED 720 at P5 |
24 Jan 2012 |
OK |
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| 2152 |
FED_714 |
CRC Errors in Event Builder but not LRB. All errors from single LRB chip. See details below
While it would be good to run the memory test on this guy, the symptoms are not classic DRAM failure http://cmsonline.cern.ch/cms-elog/402680
31 Jan 2012: Passes LRB, DSP memory tests in 904. Good board? Worth testing at P5 |
6/11/2010 |
Good |
| 2153 |
FED_720 |
Developed memory problems on LRB3 (sp 9,10,11) during Dec 2011 shutdown. Removed on 24 Jan 2012 http://cmsonline.cern.ch/cms-elog/750642. Repaired, test ok 2012-03-06
8 May 2012 Installed as FED 720 at P5 |
24 Jan 2012 |
OK |
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| 2156 |
FED_714 |
Tested. |
6/1 |
OK |
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| 2156 |
904 Hospital |
Tested. |
6/1 |
sick? not in latest P5 scan |
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| 2157 |
*CERN |
Tested. Warped board |
6/1 |
OK/warped |
| 2158 |
BU |
Problem: DSP FW version 0x301c reports as version 0x0 on this board. Can program manually with DCC2Tool.exe w/o issues. CRC of DSP FW reported by DCC2Tool.exe is correct. |
6/1 (returned) |
Sick |
| 2159 |
904 Hospital |
Tested. 8/18/11 fail LRB4 test, however, this LRB is not in use (no spigots attached to HTRs)
Developed memory issues on LRB1 (sp 3,4,5) over Dec 2011 shutdown. Removed on 24 Jan 2012: http://cmsonline.cern.ch/cms-elog/750642 Now LRB1 and LRB4 bad. Repaired, test ok 2012-03-06 |
24 Jan 2012 |
OK |
| 2160 |
904 Spares |
Removed from FED 700 due to UERR on spigot 13 - 10/29/09.
27 Jan 2012: Cannot reproduce UErrs on lxcmdtest3 while running at 83 kHz. Board looks good |
27 Jan 2012 |
Ok |
| 2161 |
FED_708 |
Tested. |
6/1 |
OK |
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| 2162 |
904 Spares |
3 Aug 2011: Removed because it is not sending events over VME. Perhaps DAQ software issue? http://cmsonline.cern.ch/cms-elog/637389
26 Jan 2012: Tested on cmsmoe4 in 904. VME readout works just fine. Returning to pile of good spares |
26 Jan 2012 |
OK |
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| 2162 |
FED_715 |
3 Aug 2011: Removed because it is not sending events over VME. Perhaps DAQ software issue? http://cmsonline.cern.ch/cms-elog/637389
26 Jan 2012: Tested on cmsmoe4 in 904. VME readout works just fine. Returning to pile of good spares |
26 Jan 2012 |
OK |
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| 2163 |
BU |
DDR memory chip replaced |
2 Aug 2011 |
OK |
| 2164 |
FED_715 |
Tested. |
6/9 |
OK |
| 2165 |
FED_711 |
Tested. |
6/9 |
OK |
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Changes: |
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> | Updated to match latest round of spares installed. List of S/N installed in P5 is correct, not sure all
other information is up to date.
-- EricHazen - 20 Sep 2012 |
| | For completeness, I would like to paste this here:
FED Crate Slot Serial DSP VME LRB0 LRB1 LRB2 LRB3 LRB4
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