|
META TOPICPARENT |
name="DCC2Documentation" |
10 Prototype boards with red front panels were manufactured in early 2009. These boards are not identical to
the production boards because they have a smaller FPGA. The production front panels are marked "DCC2" and are black. |
|
2140 |
FED_728 |
Tested. Initially 2 errors. 2nd time tested-no errors. Probably a wiring issue. |
5/26 |
OK |
2141 |
FED_723 |
Tested. |
5/26 |
OK |
2142 |
FED_701 |
Prior incident as different FED (3/24/10): Was removed when we had an issue where no HTRs were sending data. No other symptoms point to DCC failure |
6/11/10 |
OK |
|
|
< < |
2143 |
BU |
Tested. Ethernet error(RJ 45). Was not fixed. Returned to BU 6/9/09. |
Accidentally shipped 5/26 |
Sick |
|
> > |
2143 |
CERN |
Tested. Ethernet error(RJ 45). Was not fixed. Returned to BU 6/9/09. Tested/shipped back to CERN |
8/18/11 |
OK |
|
|
2144 |
FED_722 |
Tested. |
5/26 |
OK |
2145 |
904 Spares |
"Stops sending events down SLINK and goes to OFW at 80 kHz" . Tested OK by PDL 4/1/11 |
11/16 |
OK |
2146 |
BU |
Tested. Pin9 of HTR14 RJ45 to U14 line open. Could be a PCB problem. |
|
Sick |
|
|
2156 |
FED_714 |
Tested. |
6/1 |
OK |
2157 |
*CERN |
Tested. Warped board |
6/1 |
OK/warped |
2158 |
BU |
Problem: DSP FW version 0x301c reports as version 0x0 on this board. Can program manually with DCC2Tool.exe w/o issues. CRC of DSP FW reported by DCC2Tool.exe is correct. |
6/1 (returned) |
Sick |
|
|
< < |
2159 |
FED_713 |
Tested. |
6/1 |
OK |
|
> > |
2159 |
FED_713 |
Tested. Removed from FED 713 8/18/11 fail LRB4 test |
6/1 |
LRB4 sick |
|
|
2160 |
904 Hospital |
Removed from FED 700 due to UERR on spigot 13 - 10/29/09. |
6/1 |
Sick |
2161 |
FED_708 |
Tested. |
6/1 |
OK |
2162 |
FED_716 |
Tested. |
6/1 |
OK |
|
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< < |
2175 |
BU |
Tested. Broken LED-->VME. |
|
Sick |
|
> > |
2175 |
CERN |
Tested. Broken LED-->VME. Declared good, shipped to CERN |
8/18/11 |
OK |
|
|
2176 |
FED_703 |
Tested. |
6/9 |
OK |
2177 |
FED_709 |
Tested. |
7/1 |
OK |
2178 |
FED_700 |
Tested. Installed to replace 2160 - 10/29/09 |
7/1 |
OK |
|
|
2182 |
*CERN |
Tested. |
7/1 |
OK |
2183 |
BU |
Tested. |
Ship to MN 2011-05-12 |
OK |
2184 |
BU |
Tested. CRC error, SLINK error. "event size of 4800 words is unreasonable" |
|
Sick |
|
|
< < |
2185 |
BU |
Tested. |
|
OK |
2186 |
BU |
Tested. |
|
OK |
|
> > |
2185 |
CERN |
Tested. Shipped to CERN |
8/18/11 |
OK |
2186 |
CERN |
Tested. Shipped to CERN |
8/18/11 |
OK |
|
|
2187 |
BU |
Board is warped. won't fit into crate. |
|
Sick |
2188 |
BU |
Tested. Ethernet RJ45 error. |
|
Sick |
|
|
< < |
|
> > |
2189 |
CERN |
Tested. Shipped to CERN |
8/18/11 |
OK |
|
|
2190 |
CERN |
Tested. |
1/10 |
OK |
2191 |
CERN |
Tested. |
1/10 |
OK |
2192 |
CERN |
Tested. |
1/10 |
OK |
2193 |
BU |
Returned ~3/10/10 w/ spigot 3 problem (CASTOR) |
1/10 |
Sick |
2194 |
BU |
Tested. |
3/11/11 -- problems with spigots 3-5 (Eric/Dick) |
Sick |
|
|
< < |
2195 |
BU |
Tested. |
|
OK |
2196 |
BU |
Tested. |
|
OK |
|
> > |
2195 |
CERN |
Tested. Shipped to CERN |
8/18/11 |
OK |
2196 |
CERN |
Tested. Shipped to CERN |
8/18/11 |
OK |
|
|
2197 |
BU |
Tested. |
|
OK |
2198 |
BU |
Not ever tested? |
|
? |
|
|
2197 |
BU |
Tested. |
|
OK |
2198 |
BU |
Not ever tested? |
|
? |
|
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< < | |
| Changes: |
|
> > |
S/N 2159 fails LRB4 link/memory test in the pit as FED 713. PDL is swapping it out.
-- EricHazen - 18 Aug 2011 |
| S/N2163 LRB0 memory chip replaced. OK now.
-- Main. Shouxiang Wu - 2 Aug 2011 |