Difference: DCC2BoardDatabase (10 vs. 11)

Revision 1104 Jun 2009 - AshleyRubinstein

Line: 1 to 1
 
META TOPICPARENT name="DCC2Documentation"
10 Prototype boards with red front panels were manufactured in early 2009. These boards are not compatible with the production boards because they have a smaller FPGA. The production front panels are marked "DCC2" and are black.
Line: 45 to 45
 
2144 CERN Tested. 5/26
2145 CERN Tested. 5/26
2146 BU Tested. Pin9 of HTR14 RJ45 to U14 line open. Could be a PCB problem.  
Changed:
<
<
2147 BU Tested. Two broken LEDs, Ethernet error(RJ 45), and CRC error. Errors fixed as of 6/3
>
>
2147 BU Tested. Two broken LEDs, Ethernet error(RJ 45), and CRC error. R25 cold solder,D25 is also missing. Errors fixed as of 6/3
 
2148 CERN Tested. 5/26
2149 BU Tested. U0 soldering problem(most likely because U10 looks OK) Multiple lines to U10 without connection
2150 BU Tested.  
Changed:
<
<
2151 BU Tested. 6/1
2152 BU Tested. 6/1
2153 BU Tested. 6/1
2154 BU Tested. 6/1
2155 BU Tested. 6/1
2156 BU Tested. 6/1
2157 BU Tested. 6/1
2158 BU Tested. 6/1
2159 BU Tested. 6/1
2160 BU Tested. 6/1
2161 BU Tested. 6/1
2162 BU Tested. 6/1
2163 BU Tested. 6/1
>
>
2151 CERN Tested. 6/1
2152 CERN Tested. 6/1
2153 CERN Tested. 6/1
2154 CERN Tested. 6/1
2155 CERN Tested. 6/1
2156 CERN Tested. 6/1
2157 CERN Tested. 6/1
2158 CERN Tested. 6/1
2159 CERN Tested. 6/1
2160 CERN Tested. 6/1
2161 CERN Tested. 6/1
2162 CERN Tested. 6/1
2163 CERN Tested. 6/1
  EricHazen - 15 Apr 2009 \ No newline at end of file
 
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