Difference: AMC13GeneralToDo (4 vs. 5)

Revision 516 Apr 2014 - EricHazen

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META TOPICPARENT name="HcalDTC"
See also FinalAMC13Discussion page at CERN with collaborators' requests
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  • Separate DAQ and TTC resets to avoid clock disruption
  • Maintain history of TTS state changes
Changed:
<
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-- EricHazen - 12 Jun 2013
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Documentation/Questions

  • What does "SLINK ID" in bits 31-16 of register 4 do?
  • What do bits 10:0 of register 0xb do? (documented as "SDRAM write page address")
  • What is "catch mode"? Does this mean events captured when bits 16 or 17 of register 2 are set to '1'?
  • What does register 0x19 ("TTS test pattern register") do? bits 0-7 marked "HTR trigger mask"
  • It seems one monitored event word count is missing. Three needed? One at 0xd, other at 0x1d

-- EricHazen - 16 Apr 2014

 
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