Difference: AMC13GeneralToDo (1 vs. 5)

Documentation/Questions

• What does "SLINK ID" in bits 31-16 of register 4 do?
• What do bits 10:0 of register 0xb do? (documented as "SDRAM write page address")
• What is "catch mode"? Does this mean events captured when bits 16 or 17 of register 2 are set to '1'?
• What does register 0x19 ("TTS test pattern register") do? bits 0-7 marked "HTR trigger mask"
• It seems one monitored event word count is missing. Three needed? One at 0xd, other at 0x1d

-- EricHazen - 16 Apr 2014

Hardware / Production

• Front panel labels
• Assign serial numbers to all boards
• QRCode labels point to web page (fix the server)
• Label for T3 with MAC address

• Update IPBus; enable RARP
• Implement temp sensor and MAC address readout over IPMI
• New event builder
• TTS output speed-up to e.g. 320Mb/s

Testing

• Study clock phase drift
• High trigger rate tests
  • 100kHz random triggers from the TTT
    • Using fake data generator in AMC13
    • Using uHTR
• IBERT testing of optical and backplane links (Mr Wu)

• Separate DAQ and TTC resets to avoid clock disruption

• Release AMC-AMC13 backplane link firmware
  • Version with trigger path disabled for full 5.0Gb/s usable bandwidth

See also FinalAMC13Discussion page at CERN with collaborators' requests

Hardware

• IBERT testing of optical and backplane links
• Extra signals from T2 to T3 to support TTC upgrade (see CERN page above)

Firmware

• Maintain history of TTS state changes

-- EricHazen - 12 Jun 2013