Difference: AMC13BoardDatabase (74 vs. 75)

Revision 7509 Apr 2014 - DavidZou

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META TOPICPARENT name="HcalDTC"
Each AMC13 as shipped is a 3-board stack (T1, T2, T3). The serial number is set by soldered jumpers on the T2 board (8 bits). On AMC13XG the serial number is printed on the front panel label in decimal.
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 NOTE: 3 prototype "new T2" boards were assembled in 2014-03 with serial numbers 48, 49, 50. They are listed in the table below.
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Serial No Location
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Serial No Location Notes
 
48 CERN (Magnus' lab)
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49 BU
50 BU
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49 BU T2 in SN 33
50 BU disassembled
  AMC13XG with Kintex-7

Serial No Status MMC Rev Firmware Rev Location Notes Computer
32 (0x20) HW Tested 2.0 T1: 0x84 T2: 0x15 UMN FW currently broken (IPbus issue)  
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33 (0x21) HW Tested 2.1 T1: 0x103 T2: 0x19 BU (2/28/14). T3 reattached (after Clock Tests), (2/14/14 Working and Tested)  
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33 (0x21) HW Tested 2.1 T1: 0x103 T2: 0x19 BU (2014/04/09) Currently out of Commission, T2 removed, replaced w/ 49 T2 (2/28/14). T3 reattached (after Clock Tests), (2/14/14 Working and Tested)  
 
34 (0x22) HW Tested 2.1 T1: 0x8d T2: 0x17 BU (Working, 3/3/14, using SN34 T1 and SN37 T2 board, for some reason the IP address autoconfigures to 192.168.1.100/1 equivalent ip of SN77) (prev at cornell) Won't power up? (Testing, 8/6/2013) Problem seems to be in T1 board. Swapped parts w/ SN 43 for testing. SN34 T2 w/ the SN43 T1 seems to work. SN34 T1 w/ SN43 T2 exhibiting same problems. (Currently disassembled in EDF 2/10/14)  
35 (0x23) HW Tested 2.0 T1: 0x84 T2: 0x17 UW Madison FW currently broken (IPbus issue)  
36 (0x24) HW Tested 2.0 T1: 0x86 T2: 0x17 Imperial College FW currently broken (IPbus issue)  
 
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37 (0x25) Some HW Problems   T1: 0x87 T2: 0x17 BU Has new T2 board (serial num 50), experiencing problems. Handle mechanism fixed. FPGA Unconfigure after update to 0x89 firmware (2/10/2014 - Now has T1: 0x102 T2:0x19 firmware and experiencing memory problem)  
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37 (0x25) Some HW Problems   T1: 0x87 T2: 0x17 BU (2014/04/09) disassmabled. Has new T2 board (serial num 50), experiencing problems. Handle mechanism fixed. FPGA Unconfigure after update to 0x89 firmware (2/10/2014 - Now has T1: 0x102 T2:0x19 firmware and experiencing memory problem)  
 
38 (0x26) HW Tested 2.0 T1: 0x87 T2: 0x17 CERN FW works at 2.5 Gb/s backplane link speed  
39 (0x27) HW Tested 2.1 T1: 0x8d T2: 0x17 Cornell Ship to Cornell 7/30/13, returned to BU capacitor on T2 replace and hand carried back to Cornell by Nic (after testing)  
40 (0x28) HW Tested 2.1 T1: 0x103 T2: 0x19 Kentucky (2/14/14 Working and Tested)  
 
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