| |
| META TOPICPARENT |
name="HcalDTC" |
Each AMC13 as shipped is a 3-board stack (T1, T2, T3). The serial number is set by soldered jumpers on the T2 board (8 bits). For now, the serial number is written on the front panel with a marker and is a small integer. |
| |
|
|
<
< |
| 33 (0x21) |
HW Tested |
2.1 |
T1: 0x8a T2: 0x17 |
BU |
|
|
|
>
> |
| 33 (0x21) |
HW Tested |
2.1 |
T1: 0x8a T2: 0x17 |
BU |
Probe attached for Clock Tests (T3 off) |
|
|
| |
| 34 (0x22) |
HW Tested |
2.1 |
T1: 0x8a T2: 0x17 |
BU |
Previous communications problems seem to have been fixed |
|
| 35 (0x23) |
HW Tested |
2.0 |
T1: 0x84 T2: 0x17 |
UW Madison |
FW currently broken (IPbus issue) |
|
| 36 (0x24) |
HW Tested |
2.0 |
T1: 0x86 T2: 0x17 |
Imperial College |
FW currently broken (IPbus issue) |
|
|
| |
| 37 (0x25) |
Some HW Problems |
|
T1: 0x87 T2: 0x17 |
BU |
Handle mechanism fixed. FPGA Unconfigure after update to 0x89 firmware |
|
| 38 (0x26) |
HW Tested |
2.0 |
T1: 0x87 T2: 0x17 |
CERN |
FW works at 2.5 Gb/s backplane link speed |
|
| 39 (0x27) |
HW Tested |
2.1 |
T1: 0x87 T2: 0x17 |
Cornell |
Hand carried via FNAL by Eric |
|
|
|
<
< |
| 40 (0x28) |
|
|
T1: 0x87 T2: 0x17 |
BU |
Currently being used in AMC13 slot--has correct front panel |
|
| 41 (0x29) |
HW Tested |
2.1 |
T1: 0x8a T2: 0x17 |
BU |
|
|
|
>
> |
| 40 (0x28) |
HW Tested |
2.1 |
T1: 0x8b T2: 0x17 |
BU |
Currently being used in AMC13 slot--has correct front panel |
|
| 41 (0x29) |
HW Tested |
2.1 |
T1: 0x8b T2: 0x17 |
BU |
Tested again (7/16), ready to ship to Imperial |
|
|
| |
| |
| 42 (0x2a) |
HW Tested |
2.1 |
T1: 0x8a T2: 0x17 |
BU |
|
|
|
|
<
< |
| 43 (0x2b) |
HW Tested |
2.1 |
T1: 0x8a T2: 0x17 |
BU |
|
|
| 44 (0x2c) |
(HW Issues) |
2.1 |
|
BU |
More Bizzare problems (see test log) |
|
|
>
> |
| 43 (0x2b) |
HW Tested |
2.1 |
T1: 0x8a T2: 0x17 |
BU |
Probe attached for Clock Tests (T3 off) |
|
| 44 (0x2c) |
HW Tested |
2.1 |
T1: 0x8a T2:0x17 |
BU |
More Bizzare problems (see test log), HW Working, although multiple runs of production test cause errors occasionally |
|
|
| |
| 45 (0x2d) |
HW Tested |
2.1 |
T1:0x8a T2: 0x17 |
BU |
|
|
| 46 (0x2e) |
HW Tested |
2.1 |
T1:0x8a T2: 0x17 |
BU |
|
|
|
Copyright © 2008-2021 by the contributing authors. All material on this collaboration platform is the property of the contributing authors.